Parameterized Configuration for a Programmable Logic Device

The invention relates to a method and a tool for generating a parameterized configuration for a Field Programmable Gate Array from a Boolean function, the Boolean function comprising at least one parameter argument, comprising the steps generating at least one tunable logic block from the Boolean function and from at least one parameter argument, and mapping the at least one tunable logic block to the Field Programmable Gate Array. This is advantageous since a parameterized configuration can be generated faster than with conventional tools.

Attached files:
EP 2304622.jpg

Patents:
EP 2,304,622

Inventor(s): BRUNEEL KAREL [BE]

Type of Offer: Sale



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