Methods for memory assignment schemes and architecture for shareable parallel memory module based internet switches

Systems and methods are described for high-speed memory assignment schemes for routing packets in a sharable parallel memory module based switch system. A method includes receiving a parameter, determining availability of memory location, determining if an available memory location is pre-assigned, and assigning a packet a parameter if the memory location is available. Systems of the present invention provides hardware and/or software based components for implementing the steps of receiving a parameter, determining available memory location, determining if available memory location is pre-assigned, and assigning a packet a parameter if the memory location is available.

Attached files:


Patents:
US 7,532,635

Inventor(s): KUMAR SANJEEV [US]

Type of Offer: Sale



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