Method and System for a Run-time Reconfigurable Computer Architecture

A reconfigurable computer architecture is disclosed. The reconfigurable computer architecture has a plurality of logic elements, a plurality of connection switching elements, and a plurality of volatile and/or non- volatile configuration random access memories (RAMs). Each of the configuration RAMs is electrically coupled to at least one of the plurality of logic elements or at least one of the connection switching elements.

Patents:
WO 2,011,066,650

Inventor(s): ZHANG WEI [SG]; JHA NIRAJ K [US]; SHANG LI [US]

Type of Offer: Licensing



« More Computer Science Patents

---