System and Method for Hardware Acceleration of a Software Transactional Memory

In a transactional memory technique, hardware serves simply to optimize the performance of transactions that are controlled fundamentally by software. The hardware support reduces the overhead of common TM tasks-conflict detection, validation, and data isolation-for common-case bounded transactions. Software control preserves policy flexibility and supports transactions unbounded in space and in time. The hardware includes 1) an alert-on-update mechanism for fast software-controlled conflict detection; and 2) programmable data isolation, allowing potentially conflicting readers and writers to proceed concurrently under software control.

Patents:
US 20,110,099,335

Inventor(s): SCOTT MICHAEL L [US]; DWARKADAS SANDHYA [US]; SHRIRAMAN ARRVINDH [US]; MARATHE VIRENDRA [US]; SPEAR MICHAEL F [US]

Type of Offer: Licensing



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