Magnetic Tunnel Junction Ternary Content Addressable Memory

Content Addressable Memory (CAM) finds numerous applications in
pattern matching, internet data processing, packet forwarding, tag bits
storage in processor cache, as associative memory as well as many other
fields where searching a specific pattern of data is a major operation.
CAMS can be divided into two categories depending on the number of
states that can be stored in the memory cell namely, Binary CAM which
stores a binary bit i.e. “0” and “1’ and Ternary CAM what stores the above
mentioned bits as well as the “don’t care (X)” bit as its third possible value.
Conventional CMOS CAMs suffer from a number of limitations relating
to area, power and speed. For example, the special functionality of the
content search in CAM requires a comparison circuitry integrated with the
memory cell and the comparator in addition to a memory element adds
area and power overheads in CAMs. The need to store and match “don’t
care” bit requires two storage bits which further worsen the area overhead.
As a result the need for non-volatile technologies that are more
area efficient than a SRAM and can provide zero power leakage is an
attractive scenario.

Patents:
US 9,543,013 issued 2017-01-10   [MORE INFO]

Type of Offer: Licensing



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