Hardware Architecture of Programmable Reduced Instruction Set computers ("PRISC"

Summary The invention is a computer system capable of operating at speeds and efficiency levels generally associated with reduced instruction set computers ("RISC"), while also executing complex functions often associated with a complex instruction set computer ("CISC"). This is accomplished by forming a complex instruction form a group of instructions, each of which is individually executable by a first processor. The instruction is subsequently assigned an identifier and stored in memory. During operation of the computer system, should the need arise to execute a complex instruction then, rather than have the processor execute many individual instructions to achieve the complex function, the complex instruction will be executed as a single instruction by a second programmable processor.

Applications High performance RISC computers. For Further Information Please Contact the Director of Business Development Alan Gordon Email: [email protected] Telephone: (617) 384-5000

Inventor(s): Smith, Michael D.

Type of Offer: Licensing



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