An Interleaving Method Used to Boost Dynamic Performance of Current-Steering Type D/A Converters

Background Current-steering digital-to-analog converters (DACs) with excellent dynamic performance are important building blocks in high-performance electronic systems. This invention significantly boosts the DAC’s dynamic performance in applications where the load is resistive and the output voltage varies with the signal. In conventional current-steering DACs, HD3 and IM3 performance are limited by the data-dependent charging and discharging of parasitic capacitors connected to the common-source node of the current-steering switches.

Additionally, the DAC’s glitch energy, if it is data-dependent, also limits dynamic performance. Therefore, solving both of these problems will yield a DAC with superior characteristics.

Invention Description The invention uses two internal sub-DACs, both operating at half the samplin frequency, each taking turns to drive the output load. Each sub-DAC is idle every othe cycle, and will drive a dummy load to set its internal bias points so that during the activ cycle (the next cycle), the sub-DAC does not have to charge its internal parasiti capacitors, and exceptional performance can be achieved.

Benefits

Maximized dynamic performance Improved SFDR Improved IMD Data-independent switching

Market Potential/Applications Cellular phone base stations, wireless transmitters, HDTV, arbitrary waveform generation, automated test equipment.

Development Stage Proof of concept

IP Status One U.S. patent application filed

UT Researcher Robin M. Tsang, M.S., Electrical and Computer Engineering, The University of Texas at Austin

Type of Offer: Licensing



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