Substrate Structures for InP-Based Devices

U.S. Patent 4,963,949

Technology Description A substrate structure for an InP-based semiconductor device having an InP based film is disclosed. The substrate structure includes a substrate region having a lightweight bulk substrate and an upper GaAs layer. An interconnecting region is disposed between the substrate region and the InP-based device. The interconnecting region includes a compositionally graded intermediate layer substantially lattice-matched at one end to the GaAs layer and substantially lattice-matched at the opposite end to the InP-based film. The interconnecting region further includes a dislocation mechanism disposed between the GaAs layer and the InP-based film in cooperation with the graded intermediate layer, the buffer mechanism blocking and inhibiting propagation of threading dislocations between the substrate region, and the InP-based device.

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See the full U.S. Patent for this technology. NREL is looking for an organization to develop and commercialize this innovative technology. Interested organizations may consider developing/commercializing this technology through a license agreement, Cooperative Research Agreement, or Work for Others agreement. Please contact Richard Bolin at (303) 275-3028 for licensing, CRADA, and Work for Others opportunities.

Type of Offer: Licensing

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