High Rate Parallel Digital Receiver (NPO-21230)

The data rates for NASA missions are increasing very rapidly. In order to process these high data rates, high-processing hardware is required. For baseband data processing, there exist inexpensive PCI-based solutions; But for RF processing, the current solutions are based on either all analog or mixed technology with flexibility offered only at great cost and size. For an all-digital solution, the sampling rate of passband data is at least four times the data rate. That is, a minimum of four samples per symbol is required in order to demodulate the modulated data and then perform carrier recovery with an all-digital receiver. The multi-rate signal processing algorithms developed by NASA's Goddard Space Flight Center and Jet Propulsion Laboratory require the demodulator ASIC to run at a clock rate that is only one fourth the data rate.

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