An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks
Smartcards, cards where information is stored locally on an embedded integrated circuit rather than a magnetic strip, are examples of secure hardware devices that are becoming prolific in use. Such devices are used for everything ranging from toll payment and secure access identification cards to ATM and supermarket frequent shopping cards. One of the major advantages of using such secure hardware devices is that the data is stored on the actual device rather than on a central computer server. The information is therefore not susceptible to the increasingly widespread attacks by hackers who target central servers in banks and other institutions which house critical and secret information.As the use of such encrypted hardware devices grows, thieves are resorting to more sophisticated techniques to access the secret data, making users vulnerable to having important information compromised. One such approach uses power analysis to gain access to the data contained in devices such as smartcards. Power analysis is a method for extracting secret information from an operating device by exploiting a covert information channel which exists via the power connectors of an integrated circuit. This approach exploits data-dependent variations in the current drawn by the device. Although these variations in current are relatively small, statistical correlation methods can be used to extract information through power consumption traces as the device is repeatedly used, known as a Differential Power Analysis (DPA) attack. There have been many groups working on countermeasures to DPA attacks. However, many such approaches require modifications to the structure of the integrated circuit processing blocks which may not be feasible under certain circumstances.
The present invention details a novel circuit design that can be added to a secure hardware device that suppresses information leakage through the power supply side channel. This circuit design offers a number of advantages including: 1) It can work in conjunction with already known and widely-used countermeasures, 2) It can be added readily to the protected hardware without constraining the design, and 3) it has a small area footprint. Theoretical and experimental analyses have shown that the circuit designed by the inventors increases the workload to carry out a successful DPA attack by over two orders of magnitude.
Inventor(s): Williams, Blalock and Ratanpal
Type of Offer: Licensing
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