Micro-Machined Metal-Insulator-Semiconductor Field Effect Transistor (MISFET) with an Air-Gap Insulating Layer

A process for fabricating a semiconductor device having, for example, a MISFET transistor, is provided which comprises the steps of (a) providing a partially fabricated semiconductor device comprising a substrate and a first and second polysilican layer insulatively spaced from the substrate by an insulating layer, the insulating layer having an opening therein which exposes the surface of the first polysilicon layer positioned below the second polysilicon layer and (b) exposing the partially fabricated semiconductor device to a noble gas halide to substantially remove the first polysilicon layer.

Type of Offer: Licensing

Next Patent »
« More Engineering - Electrical Patents

Share on      

CrowdSell Your Patent