Circuits and Methods for Processors with Multiple Redundancy Techniques for Mitigating Radiation Errors
Embodiments of circuits for processors with multiple redundancy techniques for mitigating radiation errors are described herein. Other embodiments and related methods and examples are also described herein.
Attached files:Patents:US 20,100,268,987
Inventor(s):
CLARK LAWRENCE T [US]; PATTERSON DAN W [US]
Type of Offer:
Licensing
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